1. Field of the Invention
The present invention relates to a semiconductor device and a method for forming the same. More particularly, the present invention relates to a thin film transistor applicable to liquid crystal electro-optical devices, contact type image sensors, and the like.
2. Description of the Prior Art
Insulated gate field effect semiconductor devices known to the present have been widely applied to various fields. Such semiconductor devices comprise a silicon substrate having integrated thereon a plurality of semiconductor elements so that the devices may function as integrated circuits (ICs) and large scale integrated circuits (LSIs).
In addition to the insulated gate field effect semiconductor devices of the type mentioned above, there is another type of such insulated gate field effect semiconductor devices which comprises a thin film semiconductor formed on an insulator substrate, rather than a silicon substrate. Those thin film insulated gate field effect semiconductor devices (referred to hereinafter as TFTs) are now more positively used, for example, in liquid crystal electro-optical devices as switching elements of pixels and driver circuits, and in read-out circuits of contact type image sensors and the like.
Those TFTs are produced, as mentioned above, by laminating thin films on an insulator substrate by a vapor phase process. This process can be conducted in an atmosphere controlled to a temperature as low as about 500° C., or even lower. Moreover, low cost substrates such those made of soda-lime glass and borosilicate glass can be utilized in those TFTs. Thus, the insulated gate field effect semiconductor device of the latter type are advantageous in that they can be fabricated using low cost substrates, and that they can be readily scaled up by depositing the thin films on a substrate having a larger area with the only limiting factor being the dimension of the apparatus in which the thin films are vapor-phase deposited. Accordingly, application of such insulated gate field effect semiconductor devices to liquid crystal electro-optical devices having a large pixel matrix structure or to a one- or two-dimensional image sensors has been expected, and, in fact, a part of such expectations has been met already.
A representative structure for the latter type of TFTs is shown schematically in FIGS. 2 and 6.
Referring to FIG. 2, a typical structure of a conventionally known TFT is explained. In FIG. 2, a thin film semiconductor 2 made of an amorphous semiconductor is deposited on a glass insulator substrate 1, and the thin film 2 comprises on the surface thereof a source area and a drain area 3, source and drain contacts 7, and a gate 11.
Those types of TFTs comprise, as mentioned above, semiconductor layers having deposited by a vapor deposition process. Since the electron and hole mobilities of the semiconductor layers in those TFTs are significantly low as compared with those of the conventional ICs and LSIs, it has been customary to subject the semiconductor layer 2 to a heat treatment for the crystallization thereof.
In a conventional TFT as shown in FIG. 2, the gate 11 is covered with a relatively thick interlayer insulator film 4 such as a silicon nitride film and a silicon oxide film, and to this interlayer insulator film are provided contact holes by a photolithographic process. The source and drain contacts 7 are electrically connected with source and drain areas 3. If feeding points to the source and the drain were to be provided at such positions, the distance L between each of the feeding points and the channel end becomes considerably long.
As mentioned earlier, the TFTs fabricated by a thin film deposition process at low temperatures are significantly low in the carrier mobility. Even upon doping an impurity, the still low conductivity produces a resistance within this distance L. Accordingly, the conventional TFTs suffer poor frequency characteristics and increase in ON circuit resistance. Furthermore, the area necessary for a TFT increases inevitably with increasing length of L. This made it difficult to accommodate a predetermined number of TFTs within a substrate of a limited dimension.
In FIG. 6, a thin film semiconductor 102 composed of an amorphous semiconductor is deposited on a glass insulator substrate 101, and the thin film 102 comprises on the surface thereof a source and a drain area 103, source and drain electrodes 107, and a gate 111.
The TFTs of this type in general are produced by first depositing a semiconductor film on the substrate, and, by patterning, forming island-like semiconductor areas 102 on the desired parts using a first mask. Then, an insulating film and further thereon a gate material are formed, from which a gate electrode 111 and a gate insulating film 106 are obtained by patterning using a second mask. A source and a drain area 103 are established on the semiconductor areas 102 in a self-aligned manner, using the gate electrode 111 and a photoresist formed using a third mask as masks. An interlayer insulator film 104 is formed thereafter. To this interlayer insulator film are provided contact holes using a fourth mask, so that the contacts may be connected to the source and the drain through those contact holes. A contact material is provided to the resulting structure thereafter, which is patterned to form contacts 107 using a fifth mask. Thus is obtained a complete TFT.
As can be seen from the foregoing description, a TFT in general requires five masks to complete a structure, and in a complementary TFT, six masks are necessary. Naturally, a more complicated IC should incorporate further more masks. The use of increased number of masks involves a complicated process for fabricating a TFT element, which accompanies frequent mask alignment steps. Such a complicated process inevitably results in a lowered yield and productivity of the TFT elements. The demand for larger electronic devices using the TFT elements, for making the TFT elements themselves more compact, and for finer patterning, makes the yield and productivity even worse. Thus, it has been desired to develop a simpler process which involves no complicated steps, and a TFT based on a novel structure which requires less masks.